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| Features * * * * * * * * * * * 16 Multiplier-Accumulators 16 Bit Data and 12 Bit Coefficients, 32 Bit Internal Accuracy 16 Banks of 12 Bit Coefficients 16 Taps at 33 MHz Up to 32 Taps for Symmetrical or Interleaved Zeroed Coefficient Filters at 33 MHz Up to 63 Taps for Symmetrical Halfband Filters at 33 MHz Programmable Decimation by 2, 4, 8 or 16 Cascadable Keeping Symmetry Advantages Output Gain Multiplier Programmable Microprocessor Interface 208-pin QFP Package Programmable FIR Filter AT76C002 Description The AT76C002 FIR filter contains 16 multiplier-accumulators which enable it to implement a 16th order non-symmetrical FIR filter or a 32nd order symmetrical FIR filter, operating at 33 MHz. Furthermore, it can be configured to implement a 64th order filter where the even order coefficients are zero, also running at 33 MHz. The incoming samples are 16 bit coded, the coefficients are 12 bit coded and the internal accuracy is 32 bits. The AT76C002 contains 16 banks of 2 bit coefficients that can be selected in one clock cycle. These banks can also be used to perform decimation by 2, 4, 8 or 16 using FIR filters from 32 taps up to 256 taps. In decimation mode, the symmetry capabilities cannot be used. In order to implement long FIR filters at the highest frequency (i.e. 33 MHz) the circuit can be cascaded, with no limits except the internal accuracy. Symmetry properties can be used in cascade mode. This halves the number of cascaded circuits to implement symmetrical filters. In order to increase the accuracy of the intermediate results, the AT76C002 includes an output gain multiplier which enables the whole 12 bit dynamic of the coefficients to be used. Cascadability cannot be used in decimation mode. The AT76C002 includes a 16 bit microprocessor interface that can be configured to be Intel or Motorola compatible. Applications * * * * High sample rate digital filtering Image processing Video processing Matrix multiplication Block Diagram BXN Mux BXP Backward Delay Line FXP Forward Delay Line FXN ALU Register Coefficient Bank Register Coefficient Bank ALU Register Coefficient Bank Register Adder Array ALU Register Coefficient Bank Register ALU Register Register Control Unit CLOCK RESET ADR RD DATA WR/DS CS Configuration Register Output Gain Register Decimation Control Timing and Control Micro Interface PRA Mux Decimation Dual-Port RAM Register Mux Register Register 0 to 8-bit Down Shifter Mux Register 8-bit Down Shifter GAIN Register Mux DOUT Internal Structure FIR Structure Decimation The AT76C002 is built around an array of 16 17x12 multiplier-accumulators, a forward and a backward delay line which enable FIR filters of up to 32 taps to be implemented with odd and even symmetry. FIR filters with interleaved zeroed coefficients (such as half-band filters) are handled in an efficient way since a 64 tap half-band symmetrical FIR can be implemented in only one device. Coefficient Banks Using these coefficient banks, the AT76C002 can implement decimation filters by 2, 4, 8 or 16, the output rate being 2, 4, 8 or 16 times lower than the input rate. The value of the decimation is programmed in an internal configuration register using the microprocessor interface. Using the SEN Sample Enable input signal, the circuit can handle a variable incoming data rate. Cascadability The AT76C002 contains 16 banks of 12 bit coefficients that can be selected by writing to an internal register. The 12 bit coefficients are loaded using the 16 bit microprocessor data bus where the least significant 12 bits are for the coefficient and the most significant 4 bits are for the address within the bank. The bank number is selected by writing to a configuration register. The ATC76C002 can be cascaded in order to implement long high-rate FIR filters. Even in a cascaded structure, the AT76C002 can efficiently handle symmetrical and interleaved zeroed coefficient FIR filters, by cascading both forward and backward delay lines. In that way, a 128 tap symmetrical FIR filter or a 256 tap symmetrical half-band FIR filter would only require two cascaded AT76C002 devices. 2 AT76C002 AT76C002 Pin Description Name VCC GND CLOCK Function Supply voltage Ground Clock input Arithmetic Precision The AT76C002 includes several features to tune the dynamic of the output results. First of all, the 32 bit output of the FIR structure can be divided by 256 (8 bit down shifter), divided by 1 to 256 (0 to 8 bit down shifter), and then bits 23 to 8 of the data can be multiplied by a 10 bit gain. All features are accessible via the microprocessor bus. These features are useful in cascade mode because, in long filters, most of the coefficients are very low compared with the central ones. Consequently, in a cascade chain, for a device which implements a part of the filter with low coefficients, the coefficients can be tuned in order to use as much as possible the whole 12 bit dynamic. The result is then re-tuned before being transmitted to the next device in the cascade chain. CKEN_SYNC Synchronous clock enable input CKEN RESET ADR DATA RD WR/DS CS MOTO/ nINTEL SEN FXP FXN BXP BXN PRA SF DOUT OUT_DEN ENA0 ENA0_N ENA1 ENA1_N Asynchronous clock enable input Master reset input 3 bit microprocessor interface input address bus 16 bit microprocessor interface bidirectional data bus Microprocessor interface read input Microprocessor interface write/data strobe input Microprocessor interface chip select input Microprocessor interface configuration selection input Sample enable input 16 bit forward delay line input (for cascadability) 16 bit forward delay line output (for cascadability) 16 bit backward delay line output (for cascadability) 16 bit backward delay line input (for cascadability) 32 bit intermediate result input bus (for cascadability) 2 bit output configuration input bus 32 bit filter output bus Output data valid Least significant 16 bit data out enable (active high) Least significant 16 bit data out enable (active low) Most significant 16 bit data out enable (active high) Most significant 16 bit data out enable (active low) Microprocessor Interface The AT76C002 contains a 16 bit microprocessor interface which can be configured, using the MOTO/nINTEL input, to have a Motorola or Intel compatible protocol. In Motorola mode, the protocol uses CS (Chip Select), DS (Data Strobe) and RDW (Read/nWrite) signals. In Intel mode, the protocol uses CS (Chip Select), DS/WR (Write) and RDWR (Read) signals. 3 Electrical Specifications Absolute Maximum Ratings Symbol VDD VI VO +-IIk +-IOk IOLMAX IOHMAX TSH TA TSG Parameter DC supply voltage DC input voltage DC output voltage DC input diode current DC output diode current Continuous output current Continuous output current Time of outputs shorted Temperature range Storage temperature -40 -65 Min -0.5 -0.5 -0.5 Max 5.5 VDD + 0.5V VDD + 0.5V 10 20 10 10 5 +85 +150 Unit V V V mA mA mA mA sec C C Industrial or see +-IIk or see +-IOk VI < -0.5V VI > VDD + 0.5V VO < -0.5V VO > VDD + 0.5V Industrial Industrial IOZ Conditions DC Characteristics Symbol IIH IIL Parameter Input leakage, no pullup Input leakage, no pullup Highimpedance output current bi-directional pins Low level input voltage High level input voltage Low level output voltage High level output voltage Input capacitance VDD 0.5V 7 70% VDD 0.5 Min -1.0 -1.0 Max +1.0 +1.0 Unit A A Conditions VIN = VDD = 5.5V VIN = 0 VDD = 5.5V -1.0 +1.0 A VDD = 5.5V VIL VIH VOL VOH CIN 30% VDD V V V V pF CMOS inputs and bi-dir CMOS inputs and bi-dir IOL = 5.0 mA IOH = 5.0 mA Recommended Operating Conditions Symbol VDD VI VO TA TR TF Parameter DC supply voltage DC input voltage DC output voltage Temperature range Input rise time Input fall time Min 4.5 0 0 -40 Typ 5.0 5.0 5.0 Max 5.5 VDD VDD +85 15 15 Unit V V V C ns ns Industrial 10% - 90% CMOS 10% - 90% CMOS Conditions (c) Copyright Atmel Corporation 1996. Atmel Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in an Atmel Corporation product. No other circuit patent licenses are implied. Atmel Corporation's products are not authorized for use as critical components in life support devices or systems. Atmel Headquarters, 2325 Orchard Parkway, San Jose, CA 95131, TEL (408) 441-0311, FAX (408) 487-2600 Atmel Colorado Springs, 1150 E. Cheyenne Mtn. Blvd., Colorado Springs, CO 80906, TEL (719) 576-3300, FAX (719) 540-1759 Atmel Rousset, Zone Industrielle, 13106 Rousset Cedex, France, TEL (33) 42 53 60 00, FAX (33) 42 53 60 01 Terms and product names in this document may be trademarks of others. Printed on recycled paper. 0676A/76C002-A-9/96/15M |
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